1. Field of the Invention
The present invention is related to reset circuits and more particularly to a reset circuit and method for an integrated circuit having a clock pin and a data pin, but no dedicated reset pin.
2. Description of the Related Art
Reset circuits are well known in the art for resetting one or more operational modes of an integrated circuit. An integrated circuit can have an extra pin dedicated to the reset function for receiving a reset pulse provided by a controller. Not all chips, however, have a separate reset pin. The chip can also be reset by using a power on reset technique as is also known in the art. However, this requires the chip to be shut down and the recovery time is longer for normal functions and also longer test times are required, which translates to undesirable higher costs.
What is desired, therefore, is a reset function for a chip with no reset pin that can provide a reset function during normal and test modes without going into a power down mode, which requires the whole system to be shut down and takes longer time to recover.